Signal processors sometimes incorporate a front-end gain stage to keep an input signal within the input range of an analog-to-digital converter (ADC). For example, FIG. 1 shows a prior art receiver with a front-end gat stage before an ADC. Sometimes, the front-end system contains a mixer to bring the input signals to a frequency band that can be digitized by the ADC.
In a typical application, a gain control algorithm changes the front-end gain according to the signal power at the input or output of the ADC. The specific usage of the signals determines whether the front-end gain changes should be continuous or discrete. A lot of applications require continuous signals and often cannot tolerate jumps in the front-end gain due to large gain steps. However, it is extremely challenging to provide continuous gain variation with a wide gain range and sufficient linearity. Further, continuous gain is difficult to implement in semiconductor processes and special processes are usually required to design such gain stages. For example, complementary metal-oxide-semiconductor (CMOS) technology can only provide gains in steps and thus, is not well suited to implement gain stage with a continuous gain variation. Therefore, there is a need in the art for providing a signal processor that can provide a wide range of continuous front end gain.